جستجوی مقالات مرتبط با کلیدواژه « quantum-dot cellular automata » در نشریات گروه « فنی و مهندسی »

With the design of circuits at the nano-scale and observation of the problems of CMOS technology, designers are seeking suitable alternatives for this technology. Quantum-dot Cellular Automata (QCA) is one of these proposed technologies, which has attracted researchers' attention due to its high speed and low power consumption. On the other hand, the Gate Diffusion Input (GDI) method is an approach to improve power and area efficiency, which has led to higher speed, less power loss, and reduced complexity in Boolean functions through the use of fewer transistors. Furthermore, the adder, as a fundamental computational circuit in the design of digital systems, is of special importance. In this paper, a half-adder circuit, a half-subtractor circuit, and three new adder circuits in QCA technology have been designed and improved with the help of the GDI block. Simulation of these circuits using the QCADesigner software in 18-nanometer technology demonstrates the advantages of simultaneously using QCA technology and the GDI method. The results of the comparison and evaluation of the proposed circuits relative to the best existing adder indicate a reduction of about 55% in the occupied area, a significant decrease in the number of cells, and a delay that is equal to or less than 28% compared to existing works.

Quantum-dot cellular automata (QCA) is a modern technology, which has higher speed, lower power consumption, higher density, and lower complexity than conventional technologies, such as CMOS. Moreover, the gate diffusion input (GDI) technique has been successful in reducing complexity, area, and energy consumption in low-power circuit designs. In this technique, a wide range of complex logic functions can be implemented using only two transistors as the main block. In this study, a QCA-based GDI block is proposed using only 11 cells as a standard design unit that can be used to implement basic functions such as AND, OR, MUX, BUFFER, NOT and XOR in digital circuits. QCADesigner simulations of the functions in 18 nm technology indicate the superior performance of the proposed block with only one clock cycle delay in performing the operations. Moreover, the power consumption analysis of the designed circuits is performed using QCADesigner. The advantages of the proposed circuit compared to previous designs are 31% reduction in cell count, 50% smaller surface area, and 17% reduction in total energy loss.

The quantum-dot cellular automata (QCA) technology is a computational technology used to build nano-scale circuits. When the dimensions of the components decrease, the sensitivity of the circuit increases and the quantum circuits become more vulnerable to the occurrence of defects and radiation in the environment. The two major gates in this technology are inverter and majority gates, and most circuits are built based on these two gates. This paper aimed to design a seven-input majority gate in quantum-dot cellular automata by imposing low overhead on the circuit. Using a majority gate with more inputs reduces cell count, latency, and complexity in the QCA circuit. However, perhaps the need to use the seven-input gate is not yet felt we then design and implement a number of logic circuits. A new 7-input majority gate is designed in this paper, with 19 cells. The proposed structure is single-layer with an occupied area of 24564 nm2 that produces the correct output in one clock phase, then a four-input AND gate, a four-input OR gate, a two-input XOR gate, a two-input XNOR, a three-input XOR gate and a full adder are implemented using the designed seven-input gate. Including all multi-bit full adders, using the proposed seven-input gate. The proposed full adder is designed by the seven-input majority gate proposed and a fault-tolerant three-input majority gate. Therefore, it can be said that the designed full adder is somewhat tolerable, that means, it is somewhat tolerable against the fault that occur in this technology. QCAPro software is used to analyze the energy consumption of the recommended structure. Then, the circuit performance is evaluated using QCADesigner 2.0.3 simulator software for quantum-dot cellular automata.

Quantum-dot cellular automaton is a new technology for implementation of logic gates and digital circuits at nanoscale. By reducing size of the components, sensitivity of circuit increases and quantum circuits become more vulnerable to adverse environmental factors. Due to the importance of designing fault tolerant circuits, this paper presents a five-input majority gate with fault tolerance characteristic in quantum cellular automata technology. All possible faults which may occur during the process of placing cells in specific locations on the surface including displacement, deletion, rotation, and extra cell are evaluated.  In the first step, all the four types of faults are applied to the gate and the next step is to evaluate the accuracy of the gate performance with the QCADesigner simulator. In order to find such a majority gate, different methods, including the method of adding cells (the injection of redundancy to the gate) and the specific arrangement of cells are utilized. The latter method is being used more, hence, low overhead is added to the design.  The results confirm the superiority of the proposed gate over the other previously offered designs.

One of the promising ideas to improve over CMOS constrains in the nano-scales is Quantum Cellular Automata (QCA). So far, a variety of logic circuits are designed based on QCA where usually the majority and the inverter gates are the basic building blocks from which more complicated circuits are developed. In this paper, first we propose an approach to minimize the number of the majority and inverter gates in a given circuit with multiple inputs/outputs (MIMO). In our proposal, which is based on Cartesian Genetic Programming (CGP), a QCA circuit is coded as a series of integer numbers that constitutes a genotype for CGP. Applying CGP operators then, outputs the optimum phenotype including the number and the type of gates along with their interconnections. As for the verification of this approach, we apply it to 27 logic circuits and the results are reported, which show better solutions (in majority of cases) compared to the competing approaches. In addition to a fewer number of gates, our approach may provide a way to design QCA circuits with less power dissipation and/or less occupied areas.

Quantum-dot cellular automata (QCA) technology is an alternative to overcoming the constraints of CMOS technology. In this paper, a new structure for D-type latch is presented in QCA technology with set and reset terminals. The proposed structure, despite having the set and reset terminals, has only 35 quantum cells, a delay equal to half a cycle of clocks and an occupied area of ​​39204 nm2. Then, this structure has been used to implement D-type flip-flops that are sensitive to the rising, falling, and both edges. For example, the proposed structure of the rising edge D-type flip-flop has a 55 quantum cells with a delay of 0.75 clock cycles and an occupied area of ​​61404 nm2. In order to prove the proposed circuit behavior in more complex circuits, these structures have been used in the form of phase-frequency detectors, frequency dividers, and counters. Simulation of power parameters has been done for proposed structures.

Semiconductor metal oxide technology complements a popular and pervasive approach in the design of electronic and digital circuits, but in this technology, reduction at the sub-micron level is simply not feasible; therefore, quantum-dot cellular automata nanotechnology as a new way to design digital circuits and reduce power consumption was introduced. At the nanoscale, quantum-dot cellular automata cells represent a novel way of performing calculations by transmitting information through quantum cell interactions. Small dimensions, high speed, low power consumption, and low latency are the main features of this technology. Designing high-security circuits in nano-scale quantum-dot cellular automata technology is important for designers, considering the intercellular communication, low power consumption, and optimal power consumption. Therefore, this paper first describes the quantum-dot cellular automata at the nano level and then quantum cells, then important structures in this technology, timing and important points in the quantum-dot cellular automata circuit have been discussed and reviewed. In the field of security, such as cryptographic circuits, interconnections have been made at the nanotechnology of quantum-dot cellular automata technology. Finally, their structures, circuits, and performance are analyzed. The results showed that by applying some methods such as Feynman gate reversible logic, Fredkin circuit reversible key and decoding encoding process, the safety and reliability of nano-communications based on quantum-dot cellular automata technology can be increased.