High Resolution- Low Power TDC based on Multi-path Gated Ring Oscillator

This paper presents the design of a high resolution- low power 12-Bit Time-to-Digital Converter (TDC) based on Multi Path Gated Ring Oscillator (M-path GRO) in 130nm CMOS-TSMC technology. Using 2 M path GRO with different resolutions, coarse and fine resolutions, in Vernier structure enhances the effective resolution of the TDC. The designed M-path GRO TDC realized in 130nm CMOS-TSMC technology at circuit level. Simulation results show that the coarse, fine and effective resolutions of this TDC are 10PS, 8PS, 2PS respectively, and it has 8nS dynamic range. In addition, the DNL and INL of this TDC are 0.6LSB and 2LSB. The power consumption of designed TDC is 4.5mw with 1.2V power supply at 5 MSPS.