Lightweight Architecture for COLM Authenticated Ciphers and Implementation on FPGA and ASIC

Authenticated encryption schemes provide both confidentiality and integrity services, simultaneously. The CAESAR competition is being held with the aim of designing this cipher. An important criterion for selecting the final portfolio, besides security, is the hardware performance of the candidate in the environments with limited resource. In this paper, for the first time for COLM authenticated ciphers from the final round of the CAESAR, an 8-bit lightweight architecture have been presented, which is compatible with API v2. Since COLM scheme uses AES cipher as a primitive, lightweight architecture of Atomic-AES has been selected and adopted according to the API rules. Furthermore, to reduce the area in the hardware implementation, several techniques are used, including implementing one AES core in the datapath, sharing of registers and implementation doubling on the GF (2128) with 8-bit architecture for constructing the higher-order multipliers. Proposed architecture of COLM is implemented on ASIC and FPGA platforms. This architecture is similar in both platforms, but different technology mapping optimization techniques are used for each platform. Comparing the results with 128-bit implementations shows that the area on FPGA and ASIC is reduced by 62% and 74%, respectively. Also, the customized API v2 for 8-bit data width reduced the API area by 8% and 6% on the FPGA and ASIC platforms, respectively.