A 28-36 GHz Optimized CMOS Distributed Doherty Power Amplifier with A New Wideband Power Divider Structure

In this paper, a new design strategy was proposed in order to enhance bandwidth and efficiency of power amplifier.

To realize the introduced design strategy, a power amplifier was designed using TSMC CMOS 0.18um technology for operating in the Ka band, i.e. the frequency range of 26.5-40GHz. To design the power amplifier, first a power divider (PD) with a very wide bandwidth, i.e. 1-40GHz, was designed to cover the whole Ka band. The designed Doherty power amplifier consisted of two different amplification paths called main and auxiliary. To amplify the signal in each of the two pathways, a cascade distributed power amplifier was used. The main reason for combining the distributed structure and cascade structure was to increase the gain and linearity of the power amplifier.

Measurements results for designed power divider are in good agreement with simulations results. The simulation results for the introduced structure of power amplifier indicated that the gain of proposed power amplifier at the frequency of 26-35GHz was more than 30dB. The diagram of return loss at the input and output of power amplifier in the whole Ka band was less than -8dB. The maximum Power Added Efficiency (PAE) of the designed power amplifier was 80%. The output p 1dB of the introduced structure was 36dB, and the output power of power amplifier was 36dBm. Finally, the IP3 value of power amplifier was about 17dB.

The strategy presented in this paper is based on usage of Doherty and distributed structures and a new wideband power divider to benefit from their advantages simultaneously. The author(s). This is an open access article distributed under the terms of the Creative Commons Attribution (CC BY 4.0), which permits unrestricted use, distribution, and reproduction in any medium, as long as the original authors and source are cited. No permission is required from the authors or the publishers.