Low Power Bulk-Driven Time-Domain Comparator with High Voltage-to-Time Gain

This paper presents a time-domain comparator with low supply voltage and low power consumption for using in circuits that comparator’s input common-mode voltages swing is 0 to half supply voltage. To design the time-domain comparator, a delay element with a very high delay-voltage gain is proposed. The purpose of designing this comparator is to achieve high delay-voltage gain, which leads to an increase in the accuracy of the comparator, as well as a significant reduction in power consumption and occupied area compared to conventional time-domain comparators. This time-domain comparator utilizes subthreshold concept and also uses the bulk-voltage of transistor as a comparator input. The proposed comparator is simulated in 0.18µm TSMC technology at 1V supply voltage, which according to the intended application, the supply voltage can be reduced to about 0.4V. The simulation results show that with supply voltage of 1V the proposed comparator consumes 250nW at the clock frequency of 2.5MHz. The figure of merit of 0.1µW/MHz indicates the high performance of the proposed comparator. Based on the Monte Carlo simulation, the offset voltage of this comparator is obtained 2.8mV.