Design and Experimental Verification of a Single-Phase Multi-level Asymmetric Inverter

Inverters have evolved significantly in the last decade as a key component in electrical systems. Improving the performance of the inverters is a challenge, leading to many types of researches on topologies and control schemes. Multi-level voltage source inverters are suitable structures to achieve high-power and high-quality output waveforms. Till now, wide studies have been conducted in the field of multi-level inverters used in high-power and voltage applications, which have attracted attention due to their advantages, including less harmonic distortion of output waveforms, less tension of switch voltages, and low electromagnetic interference. In this paper, a sinusoidal pulse width modulation (SPWM) cascade full-bridge single-phase 7-level inverter with phase shift modulation is designed using a suitable voltage control with low capacitance for asymmetric condition and its performance is investigated. The performance of the proposed inverter is investigated under different operational conditions through simulations in MATLAB. Besides, for more investigation, an experimental sample of this inverter is constructed and the practical results are presented. The experimental results show that the output harmonic current of the inverter under symmetric performance of the output current is 1.51%. Although this THD is higher than the value obtained in the simulation results, it complies with the ISIRI 11859 standards for the current THD, which indicates that a THD less than 5% is acceptable.