نشریه مهندسی مخابرات جنوب
پیاپی 30 (زمستان 1397)

This article presents a common low-noise CMOS gate amplifier with active induction load. For large amounts of inductance, a passive inductor on the chip requires a significant area of the chip and its quality factor is limited. A situation that can be considered impractical. Therefore, the purpose of this work is to search for the possibility of using active inductors in RF circuits as a substitute for their inactive counterpart. In addition, this active inducer is programmable. It is possible to design an amplifier with a programmable central frequency. It is also shown that with proper and optimal design, the contribution of active inductor noise can be minimized. HSPICE simulation using 0.35 µm technology showed that our amplifier has a half-decade tuning range for 1GHz. The gain, noise number and power consumption of the simulated are 20dB, 3.65dB, 14mw, respectively.

Reports of close optical communication with excellent accuracy of 10 gb / s using reflective mirrors and low-loss silicon isolators for interchip communication. The construction of this piece is done with a method for planting an 8µm wide rod waveguide with a sharp mirror, which makes an angle of 54 degrees with the desired surface. Light in the waveguide of the lower chip can be paired with the waveguide in the upper chip, which is done by placing these chips facing each other, in which case the reflecting mirrors create a complete pair and a proximity and proximity of light. Very fast communication sizes have been achieved with chips placed along a nanometer-sized piece, and the results have been compared with a method in which silicon chips are bundled. Our new method of making chip cores is based on a combination of pyramid implantation on silicon, which uses a very small sphere to fine-tune the chip. Chip integration can cause the packages to adjust automatically using the location of the chips, which are a bit thick at first. The final adjustment of the chips in our new method is limited to the optical lithographic resolution. In addition, multi-chip arrays can be aligned with each other, which will have the same accuracy as before. Irreversible data (Nonreturn - to - zero data)  was sent to the waveguides at zero and transmitted during a package consisting of 3 interconnected chips and two optical components. This was done for cross-chip communication. Values such as continuous optical losses, ocular diagrams, bit error rate and power error were measured. There are more places with nano-sized locations. Disturbance or distortion of RMS and small amplitude values for ocular quality are approximately equal to the case where OP × C channels are connected to 10 Gb / s channels. This mechanism for spontaneous tuning of chips allows chips to take advantage of close communications in several different classes.

This paper presents the design and implementation of a digital-to-analog converter with a frequency of one billion samples per second and a resolution of 12 bits in the standard process of 0.35um CMOS technology. This included designing new circuits that converted the converter, with good INL results (0.7LSB for 8 bits and 0.8LSB for 12 bits). Also, SFDR with Fsig = 125Meg and Fs = 500Meg is about 73dB and for Fsig = 125Meg and Fs = 1G is about 60dB by calculating the total capacitance of the layout. Total power consumption 180mw and works with 3.3v and 2v power supplies. According to the designed layout, the occupied surface of the chip is 0.313mm2 and four metals and two polyes are used and the simulation results are done by Hspice software.

Two important parameters that should be considered in the design of a low noise amplifier (LNA) are low power consumption and low noise number. Other design problems include how to create a stable 50 ohm resistor at the input to adjust impedance while increasing gain. Also, how to linearize over a wide range of operating frequencies is an important issue to consider. Using the structure of selfie degeneration in the 0.18 µm CMOS process, the desired requirements are met. The circuit proposed in this paper has a noise number of less than 2.5db and power consumption of less than 4mw at a frequency of 1.9 and a noise number of less than 0.7db and power consumption of less than 0.9mw at a frequency of 0.9 GHz, matching the input impedance and Outputs 50 Ohms and results in proper linearization at both frequencies.

In this paper, the segmentation methods of limiting the area and the minimum path were performed in order to collect regional information on the resulting areas using the area uniformity method. In the first stage, using the image smoothing method, a number of sub-areas were converted, then a more complete segmentation was performed on each of the areas of the first stage using the methods of limiting the area and the minimum path. The proposed method identifies new sections using regular seed selection and sum spacing. The area restriction method controls the amplitude changes from one point called the seed in each area and the minimum path method controls the size of the areas. These two methods were implemented on the image and increased the compression rate by reducing the number of areas.

Production of metal-insulation-semiconductor MOS bond by electrochemical metallurgy method has been reported. To do the work, first a nickel-chromium wire was placed in a suitable electrolyte medium and by applying voltage, thin layers of aluminum and zinc metal were placed on its surface, respectively. In the next step, the resulting layers were oxidized in air at 400 ° C to form aluminum oxide layers as insulation and zinc oxide as semiconductors. By examining the Arrhenius curve while confirming that the oxide layer is semiconductor, the distance between the impure energy levels and its conductivity level was 0.18 volts. Also, by examining the C-V curve in the resulting MOS capacitor, while confirming the formation of metal-insulation-semiconductor bond, its threshold voltage was about 2.75 volts.  This activity, especially the placement of layers of different materials can be offered as a new method.