Design and simulation of an optimized Ternary-to-Binary converter based on carbon nanotube field effect transistor

This paper presents an optimized multi-digit Ternary to Binary converter based on nano-carbone tubes field-effect transistors. By modifying a part of the circuit structure of the ternary-to-binary converter, the efficiency of the system has increased. Due to the unique features nanotubes carbon tubes feild effect transistors, as well as the possibility of designing different threshold voltages for transistors, designing multi-level logic systems is much simpler and less costly. Therefore, considering that the existing processing systems work on a dual basis, the design of binary to bernary converters and vice versa is very important and basic processing systems. Therefore, considering that the existing processing systems work on a binary, the design of binary to turner and turner to binary converters is very important and fundamental in processing systems. The circuit modification has reduced chip occupancy, reduced power consumption, and reduced circuit latency. The proper and optimal performance of the proposed converter have been confirmed by simulation by HSPICE software based on 32 nm CNTFET transistor. The simulation results show that the optimal terbnary to binary converter has a power consumption of 0.665 μW and a propagation delay of 27.3 ps. These results show that overall PDP index has improved by 14.4%.