Performance Evaluation of a Carbon Nanotube FET-based Ternary Multiplexer

Due to shrinking semiconductor device and integrated circuit dimensions into nanometer regime, semiconductor industry is facing challenging problems. Transistors based on carbon nanotubes have attracted attention among logic circuit and digital system designers due to their low dimensions, high speed, low power consumption and similarity of their performance with CMOS transistors. Using Multiple Valued Logic (MVL) causes reduction in both chip area and power consumption in comparison with binary logic due to less mathematical functions. In this paper, we proposed a novel design for a multiplexer with ternaty logic using Carbon Nanotube Field Effect Transistors (CNTFETs). Eventually a comparison has been made between power and performance of this CNTFET based ternary multiplexer and its ternary counterpart in CMOS which is designed in this paper. In continue, the simulation results are presented in 32 nm technology node using HSPICE. The obtained results show between 60% to 65% improvement in latency, between 96.4% to 98% improvement in power consumption and 99% improvement in enery consumption of ternary multiplexer based on CNTFET in respect to its counterpart in CMOS. Moreover, Power Delay Product (PDP) is improved by 99%.