Hybrid Design of Forward and Reverse Converters: A New Approach to Reduce Hardware Complexity of Residue Number System

The Residue Number System (RNS) hardware structure consists of several components, including forward converter, separate arithmetic units for performing modular addition and multiplication, and reverse converter. Forward and reverse converters, essential in any RNS to interface with other digital circuits, represent overhead, resulting in larger chip-area and power-consumption. This work, for the first time, proposes a hybrid converter for RNS, which unifies forward and reverse converters by re-using hardware. To achieve this aim, the mixed-radix conversion (MRC) algorithm has been used for putting up the reverse conversion formulas in a similar format to forward conversion formulas. The VLSI implementation results of the proposed hybrid converter based on TSMC-65nm technology for the moduli set {2n−1, 22n, 2n+1−1} show a reduction up to 19% of the required area in comparison to the total area of the forward and reverse converters. However, the delay of the proposed hybrid converter is just 10% higher than individual reverse converter delay.